> ## Documentation Index
> Fetch the complete documentation index at: https://docs.embedder.com/llms.txt
> Use this file to discover all available pages before exploring further.

# Saleae Logic

> Set up Logic 2, capture digital traffic, and export raw signals and decoded frames.

Use a Saleae analyzer with Logic 2 to inspect digital timing and decode buses. Captures appear in the Monitor's **Logic** tab. Ask Embedder to identify the connected model and its available channels and sample rates before configuring a capture.

## Prepare Logic 2

1. Connect the analyzer by USB and open Logic 2.
2. Enable the **Automation API** in Logic 2 Preferences and keep Logic 2 running.
3. Complete any first-use Python/package setup requested by Embedder.
4. Connect ground and the signal channels, checking the voltage limits for the analyzer and target.

Channel indexes are zero-based. On Original Logic, housing channel 1 is index 0 and housing channel 8 is index 7. Original Logic and Logic 8 have fixed thresholds; do not request an adjustable threshold for them. For other models, use the threshold and rates reported for the connected device.

## Capture digital traffic

Give the physical channel map, duration, requested sample rate, and expected activity:

```text theme={"system"}
Use the Saleae Original Logic. Capture SDA on housing channel 1 and SCL on
housing channel 2 for two seconds. Decode I2C and save raw and decoded results.
```

For a fixed test, use a timed capture. For an operation whose duration varies, ask Embedder to start a manual capture, perform the operation, and stop the capture before exporting it. Put the capture and operation in one [hardware script](/debug-mode/hardware-scripts) when they must run in order.

The selected device and enabled channels determine the supported sample rates. Check the achieved rate before calculating pulse widths or comparing timing across runs.

## Decode a bus

The supported decoder choices include UART, SPI, I2C, CAN, LIN, 1-Wire, I2S/PCM, Manchester, JTAG, SWD, and Modbus, plus additional native Logic 2 analyzers. Ask for the available analyzer when using another protocol.

* For UART, provide the data channel, baud rate, data bits, parity, and stop bits.
* For SPI, provide clock, MISO, MOSI, chip select, clock polarity and phase, and bit order.
* For I2C, identify SDA and SCL.

```text theme={"system"}
Decode UART on channel 0 at 230400 baud, 8 data bits, no parity, and one
stop bit. Show the decoded bytes and save a CSV alongside the raw capture.
```

CAN decoding shows frames. Use [CAN Monitor](/debug-mode/can) with a project database to interpret application-level signals.

## Save and inspect

Ask for a native `.sal` capture, raw digital CSV, and a decoded CSV for each analyzer you need. Keep the raw signals so you can revisit channel assignments and decoder settings. Record the firmware revision, channel map, duration, and achieved sample rate with the result.

In a hardware script, `la_start_timed_capture()` or `la_start_manual_capture()` begins capture, `la_wait()` or `la_stop()` completes it, and `la_add_protocol_analyzer()` adds decoding. Use `la_export_raw()`, `la_export_table()`, and `la_save_capture()` for the corresponding files and Logic view.

## Troubleshoot

* **Analyzer unreachable:** keep Logic 2 open with automation enabled and close another automation session using it.
* **No device:** check USB and confirm that Logic 2 can see the connected analyzer.
* **Wrong bytes:** check physical labels against zero-based indexes, framing, SPI mode, channel order, and bitrate.
* **Requested rate changed:** choose a rate supported by the device and enabled channel combination.
* **Threshold rejected:** check whether the model has a fixed threshold.

See [Logic analyzer](/debug-mode/logic-analyzer) to compare instruments, or use an [oscilloscope](/debug-mode/oscilloscope) for voltage levels and ringing.